PARAG SHAH
6637 SW 88th Place
Portland, OR 97223
E-mail: shahp@ece.orst.edu
URL: http://lestat.iwarp.com

OBJECTIVE
Progressive employment with a microprocessor architecture or design team.


WORK EXPERIENCE
Intel Corporation
Portland Technology Development (PTD), 8/98 - present.
  • Component Design Engineer

Intel Honors Internship Program (IHIP). Each summer since 6/92. (total of 18 months)

Portland Technology Development (PTD), 6/96-9/96 and 6/97-9/97.
  • Microprocessor root-cause speedpath debugging.
  • Synthesis, simulation, modeling, and design using internal and external CAD tools.

Personal Computing Division (PCD), 6/94-9/94 and 6/95-9/95.
  • Hardware design data archival from UNIX and DOS environments using a CDR.
  • ASIC design validation. Continuing development of data archival system.

Pentium Support Hotline, 12/94-1/95.

Oregon Prototype and Production Services (OPPS), 6/92-9/92 and 9/93-9/93.
  • Successful inspector and operator on the production line.
  • Developed and integrated a screen printing control process for PCBs.

Oregon State University
Research Assistant for Dr. Shih-Lien Lu.
Lab Teaching Assistant for VLSI Design Techniques (ECE 474/574).
Assisted 60 seniors and graduate students for a VHDL-intensive project. (3/97 - 6/97)

Putt-A-Round Mini Golf
Effectively gave prompt and efficient customer service. (12/90 - 3/92)

Engineering Design Corp.
Modification of architectural and electrical blueprints. (6/89 - 9/89)


EDUCATION
Oregon State University (9/92-7/98)

Earned degrees
M.S. Electrical & Computer Engineering (7/98)
B.S. Electrical Engineering (6/96)
B.S. Computer Science (6/96).

Thesis Title
Low-Power High-Performance 32-Bit 0.5um CMOS Adder.

Grade Point Averages
Undergraduate: 3.42/4.00, Graduate: 3.71/4.00.

Graduate courses
Computer Architecture, Microprocessor System Design, Data Security & Cryptography, VLSI System Design, Parallel and Distributed Architectures, Computer Arithmetic, Computer Memory Systems, Multithreading, Analog Integrated Circuits, Semiconductor Processing.

Project
Counterflow Pipelined Processor: Microprocessor architecture design; simulator development.


COMPUTER EXPERIENCE
Operating Environments
UNIX, AIX, X-Windows, MS Windows, MS DOS.

Software Tools
Cadence, Mentor(VLSI design), MS Office, Borland C++.

Programming Languages
C++, C, Java, VHDL, Common Lisp, Awk, Perl, BASIC.


ACTIVITIES
Tennis, basketball, India Association, chess, IEEE, HKN, concerts, dancing.